tisc

tiny instruction set computer
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README.md (2718B)

      1 # Tiny Instruction Set Computer
      2 
      3 This is a for-fun implementation of a relatively simple micro-architecture, with
      4 an assembler to program the simulated implementation in [Logisim](http://www.cburch.com/logisim/).
      5 
      6 ![TISC v2.3](Screenshots/tiscv2_3.png)
      7 
      8 My goal with this project is to aim for an instruction set architecture that is
      9 focused on minimal scale. I've [written about the first ressurection of this
     10 project on my blog](https://banna.tech/post/dusty_digital_and_forgotten_ideas/)
     11 before and I am sporatically finding ways to explore the original idea of
     12 "minimal scale" through modifications and continuation of work contained within
     13 this repository.
     14 
     15 
     16 ## Want to play with it too?
     17 
     18 The default program loaded in the ExampleConfigurationROM circuit is the
     19 `ExamplePrograms/terminal_test.tac` program. The program is an interactive demo
     20 which processes text input from the keyboard component and echoes the text out
     21 to the TTY component. The 32 characters are buffered and compared to existing
     22 command strings with routines to execute per each command string.
     23 
     24 ![TISC Example configuration](Screenshots/tiscv2_3_example.png)
     25 
     26 ## Compiling the assembler
     27 
     28 To compile the assembler, I recommend using GCC:
     29 
     30 	$ gcc tisc.c -o tisc
     31 
     32 ## Using the assembler
     33 
     34 Once the assembler is compiled, you can assemble TISC assembly code like so:
     35 
     36 	$ tisc <input file> <output file>
     37 
     38 If the assembler found no errors in the code, the output file will contain the
     39 program that is ready to load into the Logisim circuit.
     40 
     41 A successful output will appear like this:
     42 
     43 	$ ./tisc ExamplePrograms/fibb_test.tac out
     44 	Assembling tac file: 'ExamplePrograms/fibb_test.tac' TISC v2.3
     45 	label line  addr:out>op         args
     46 	      0003  0000:43| li 254
     47 	            0001:fe| +
     48 	      0004  0002:9f| sp GRA
     49 	      0006  0003:c2| cin        NIL     GRC
     50 	loop  0008  0004:ab| sb GRB
     51 	      0010  0005:30| sop_xor
     52 	      0011  0006:fa| op GRB     GRC     GRC
     53 	      0012  0007:ba| op GRB     GRC     GRB
     54 	      0013  0008:fa| op GRB     GRC     GRC
     55 	      0015  0009:00| sop_add
     56 	      0016  000a:ba| op GRB     GRC     GBR
     57 	      0018  000b:fb| cmp        GRB     GRC
     58 	      0019  000c:83| jmp        loop
     59 	            000d:04| +
     60 	      0021  000e:ab| sb GRB
     61 	end   0022  000f:83| jmp        end
     62 	end         0010:0f| +
     63 	Finished assembling tac file: 'ExamplePrograms/fibb_test.tac', program size: 17 bytes
     64 
     65 ## Loading a program
     66 
     67 The provided example application in the circuit ExampleConfigurationROM is a 
     68 configuration with memory-mapped I/O. The I/O at memory address 0xFF is a ROM 
     69 that acts as the program memory. Left-clicking on the component and selecting
     70 'Load Image' will allow you to load memory images generated by the assembler.